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1 Mbit SPI Serial Flash
A Microchip Technology Company
SST25VF010A
Data Sheet
Sector-Erase
The Sector-Erase instruction clears all bits in the selected 4 KByte sector to FFH. A Sector-Erase
instruction applied to a protected memory area will be ignored. Prior to any Write operation, the Write-
Enable (WREN) instruction must be executed. CE# must remain active low for the duration of the any
command sequence. The Sector-Erase instruction is initiated by executing an 8-bit command, 20H, fol-
lowed by address bits [A 23 -A 0 ]. Address bits [A MS -A 12 ] (A MS = Most Significant address) are used to
determine the sector address (SA X ), remaining address bits can be V IL or V IH. CE# must be driven high
before the instruction is executed. The user may poll the Busy bit in the software status register or wait
T SE for the completion of the internal self-timed Sector-Erase cycle. See Figure 8 for the Sector-Erase
sequence.
CE#
MODE 3
0 1 2 3 4 5 6 7 8
15 16
23 24
31
SCK
MODE 0
SI
20
ADD.
ADD.
ADD.
SO
MSB
MSB
HIGH IMPEDANCE
1265 F08.0
Figure 8: Sector-Erase Sequence
Block-Erase
The Block-Erase instruction clears all bits in the selected 32 KByte block to FFH. A Block-Erase
instruction applied to a protected memory area will be ignored. Prior to any Write operation, the Write-
Enable (WREN) instruction must be executed. CE# must remain active low for the duration of any com-
mand sequence. The Block-Erase instruction is initiated by executing an 8-bit command, 52H or D8H,
followed by address bits [A 23 -A 0 ]. Address bits [A MS -A 15 ] (A MS = Most significant address) are used to
determine block address (BA X ), remaining address bits can be V IL or V IH . CE# must be driven high before
the instruction is executed. The user may poll the Busy bit in the software status register or wait T BE for the
completion of the internal self-timed Block-Erase cycle. See Figure 9 for the Block-Erase sequence.
CE#
MODE 3
0 1 2 3 4 5 6 7 8
15 16
23 24
31
SCK
MODE 0
SI
52 or D8
ADD.
ADD.
ADD.
SO
MSB
MSB
HIGH IMPEDANCE
1265 F09.0
Figure 9: Block-Erase Sequence
?2011 Silicon Storage Technology, Inc.
14
S725081A
10/11
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